1. Field of the Invention
This invention relates to semiconductor integrated circuit manufacture, and more particularly to a method or process for fabricating Schottky barrier diode arrays, in conjunction with other semiconductor devices, to define integrated circuit arrays.
2. Background Information
In order to provide background material for a full appreciation of the present invention, reference may be made to the following: U.S. Pat. Nos. 3,539,876, 3,860,783, 4,047,975 and 4,135,998.
U.S. Pat. No. 3,539,876 generally discloses the complete technique or process for fabricating complicated monolithic integrated circuit structures. The details of relevant process steps are incorporated by reference.
U.S. Pat. No. 3,860,783 generally discloses the concept of ion etching through a pattern mask into a substrate surface.
U.S. Pat. No. 4,135,998 discloses a method for forming a Schottky barrier contact of platinum silicide, and is pertinent to the present invention in that it deals with the formation of such a diode in a silicon semiconductor substrate.
U.S. Pat. No. 4,047,975 discloses a method of making a bipolar integrated circuit involving the required doping of a substrate by means of a series of etching steps alternated with ionic implantation steps of a selected impurity type, as well as heat treatment steps. It is pertinent to the present invention only because it discloses the use of a vertical ion beam in an etching step.
The present invention has arisen in the context of the fabrication of the aforenoted Schottky barrier diodes in conjunction or association with other devices, such as transistors, so as to form integrated arrays.
In the attempt to improve the yield of highly dense arrays, comprising Schottky barrier diodes in association with transistors and the like, it has been discovered that "resistive shorts" occur in the SBD parts of the arrays. Consequently, the particular Schottky diodes having these resistive shorts are totally useless and hence the yield for the process is substantially reduced. This particular problem of resistive shorts is predominantly seen when the technique of reactive ion etching (RIE) has been employed at the point in the fabrication process when metallization contacts are about to be applied. That is to say, at the so called "all contacts" level in the conventional technology.
What has been found by the present invention is that any pinholes in the underlying silicon oxide layer--that is, the layer underlying the conventional silicon nitride protective layer--enables the reactive gas, typically CF.sub.4, to etch all the way through the pinholes and down to the silicon substrate. As a result, when a subsequent diffusion step, such as a typical N+ diffusion in the case of a P-type substrate or P-type base region, is performed, the diffusion takes place through the "pipes" or diffusion paths thus created, thereby causing the observed resistive shorts.
In the effort to solve the problem of resistive shorts due to the pinholes being etched through, it has been suggested to substitute wet chemical etching--which is a well known technique, involving, the use of a buffered HF solution--to solve this problem. It will be appreciated that when the volume of Schottky barrier diodes in typical arrays runs to many thousands, the problem of resistive shorts causes yield losses that are not tolerable in large scale integrated devices. Moreover, in the light of the high density for the Schottky barrier diode arrays, it becomes an ineffective remedy or solution to utilize wet chemical etching. This is because such a conventional etch acts equally in all directions (isotropic etching), imposing high etch bias tolerances, thereby resulting in irregular edges and dimensioning uncertainties. Also, when attempts are made to control this equal-directional etching by the use of fixes or the like, the device profiles are changed, leading to key device parameter differences such as R.sub.db, V.sub.bc and BV.sub.cbo.
Accordingly, a primary object of the present invention is to avoid the noted problem which occurs in the fabrication of Schottky barrier diodes when these are formed or fabricated in association with active devices such as transistors or the like.
A more specific object is to provide a technique for removing a protective layer of silicon nitride or the like which overlies an oxide layer, but doing so in such a way as to avoid formation of resistive shorts in the fabrication of the Schottky barrier diode devices.